FIG. 1A illustrates an example of a conventional reference current generator circuit 100. Generator circuit 100 comprises p-type metal-oxide semiconductor (PMOS) transistor 102, PMOS transistor 106, Operational amplifier (OP-AMP) 110, resistors R1 112, R2 114, R3 116, PNP bipolar junction transistor (BJT) 118, and PNP BJT 120. Current Iref is a desired reference current on node 108 generated by circuit 100 based on the values of resistors R1 112, R2 114, and R3 116 and the gain of OP-AMP 110.
Current I1 on node 104 is proportional to the absolute temperature (PTAT) of the operating environment for circuit 100. Current I1 is given by Equation (1) as follows:
                                          I            1                    ⁡                      (            T            )                          =                  2          ⁢                                                                      k                  b                                ⁢                T                            q                        ·                                                            ln                  ⁡                                      (                    M                    )                                                  R                            .                                                          Equation        ⁢                                  ⁢                  (          1          )                    In Equation (1), kb is Boltzmann's constant 1.381×10−23 Joules per Kelvins (K), T is the absolute temperature in Kelvins, q is the constant electron charge of 1.602×10−19 Coulombs, M is a variable multiplier characteristics of BJT 120 with respect to the size of BJT 118, and R is the resistance value of resistors R1 112, R2 114, and R3 116. Purely as an example, variable T may be an operating temperature of circuit 100 such as −40° Celsius to 125° Celsius. Current I1 may vary up to 50% in circuit 100 which can cause an inconsistent reference current level Iref at node 108.
FIG. 1B illustrates an example of a conventional reference current generator circuit 101 for compensating for the temperature dependence of current I1. In circuit 101, n-type metal-oxide semiconductor (NMOS) transistor 124 provides a compensation current Icomp to negate the temperature dependence effects of current I1 at node 105 on the reference current Iref. NMOS transistor 124 may be biased in weak-inversion mode with current Icomp given by Equation (2) as follows:
                                          I            comp                    ⁡                      (            T            )                          =                                            I              s                        ⁡                          (              T              )                                ·                                                    ⅇ                                  q                  ⁢                                                            (                                                                        V                          g                                                -                                                  V                          th                                                                    )                                                                                      nk                        b                                            ⁢                      T                                                                                  (                                                ⅇ                                                            -                                              qV                        s                                                                                                            k                        b                                            ⁢                      T                                                                      -                                  ⅇ                                                            -                                              qV                        d                                                                                                            k                        b                                            ⁢                      T                                                                                  )                        .                                              Equation        ⁢                                  ⁢                  (          2          )                    In Equation (2), Vg, Vs, and Vd are the gate-to-bulk, the source-to-bulk, and the drain-to-bulk voltages of transistor 124, respectively. Variable n is a non-ideality factor dependent on the material used to fabricate NMOS transistor 124 and Vth is the threshold voltage. Vg is the gate-to-bulk voltage at node 126. The remaining parameters are defined as stated above. Current Is(T) is the saturation current given by Equation (3) as follows:
                                          I            s                    ⁡                      (            T            )                          =                              AqD            NW                    ⁢                      BT            3                    ⁢                                    ⅇ                              -                                                      E                    gap                                                                              k                      b                                        ⁢                    T                                                                        .                                              Equation        ⁢                                  ⁢                  (          3          )                    
In Equation (3), A is the area of the device gate, D is the carrier diffusivity, N is the doping concentration, W is the channel width, B is a material dependent parameter, typically 5.4×1031 K−3 cm6 for silicon, and Egap is the energy gap, typically 1.12 eV for silicon, for NMOS transistor 124. The remaining parameters are defined as stated above. Assuming Vs=0 and Vd>>kbT/q, the compensation current provided by transistor 124 is given by Equation (4) as follows:
                                          I            comp                    ⁡                      (            T            )                          ≅                              AqD            NW                    ⁢                      BT            3                    ⁢                                    ⅇ                              q                ⁢                                                      (                                                                  V                        g                                            -                                              V                        th                                            -                                                                        E                          gap                                                q                                                              )                                                                              nk                      b                                        ⁢                    T                                                                        .                                              Equation        ⁢                                  ⁢                  (          4          )                    The parameters in Equation (4) are defined as stated above.
Since I1 at node 105 is linearly dependent function of the absolute temperature level T and Icomp has an exponential function of T, a constant reference current Iref at node 108 cannot be generated by circuit 101 when adding I1 to Icomp. FIG. 1C shows the variability of reference current Iref at node 108 versus temperature in Celsius. At low temperatures, the exponential behavior of Icomp dominates the behavior of Iref while at high temperatures the linear behavior of I1 dominates the behavior of the reference current.
FIG. 1D illustrates an example of a conventional reference current generator circuit 103 for compensating for the temperature dependence of current I1. The operation of circuit 103 is similar to that of circuit 101 except for the addition of resistor RF 128, which provides the compensation current given by Equation (5) as follows:
                                          I            comp                    ⁡                      (            T            )                          ≅                              AqD            NW                    ⁢                      BT            3                    ⁢                                    ⅇ                              q                ⁢                                                      (                                                                  V                        g                                            -                                              V                        th                                            -                                                                        E                          gap                                                q                                                              )                                                                              nk                      b                                        ⁢                    T                                                                        ·                          ⅇ                                                -                  q                                ⁢                                                                                                    R                        F                                            ⁢                                                                        I                          comp                                                ⁡                                                  (                          T                          )                                                                                                                                    k                        b                                            ⁢                      T                                                        .                                                                                        Equation        ⁢                                  ⁢                  (          5          )                    The parameters in Equation (5) are defined as stated above.
Resistor RF 128 and circuit 103 may provide better reference current consistency than circuit 101 by constraining variations of Iref up to 3% as illustrated in FIG. 1E. Smaller variations of Iref over the operating temperature range are difficult to obtain because of the intrinsic difference in the behavior of I1 and Icomp with respect to the temperature variation. However, greater variations of Iref may exist if a larger operating temperature range for circuit 103 is desired. Moreover, transistor 124 is undesirably biased in weak-inversion mode, which is a mode difficult to achieve if the processing technology only comprises low-threshold transistors. If moderate inversion mode is used instead, the compensation current becomes dependent upon the threshold voltage of transistor 124 which is a process varying parameter. Therefore, a reference current that is more independent of temperature, circuit fabrication process variations, circuit material variations, and supply voltages is desirable.